1. Technical Field
The present invention relates to displays, and more particularly to a liquid crystal display panel with a reduced source resistance.
2. Related Art
Displays convey information to viewers. In the past, displays conveyed images and text through bulky, heavy, and expensive cathode ray tubes. Developments in flat panel displays having almost the same display quality as the cathode ray tubes, now convey images through much thinner screens. Further efforts are now being expended to increase the clarity of some flat panel displays images. One such display is a liquid crystal display device.
A liquid crystal display device uses a liquid compound to display images and text by controlling the light transmittance through the liquid compound. Some liquid crystal display devices include a liquid crystal display panel that has a driving circuit, a back light unit, and an liquid crystal display panel. The liquid crystal display panel may include a color filter substrate, an array substrate of thin film transistors (TFTs), and a liquid crystal layer sandwiched between the color filter substrate and the array substrate.
FIG. 1 is a plan view of a portion of an array substrate 10 of a liquid crystal display panel. The entire liquid crystal display panel is comprised of N gate lines and M data lines. The intersection of the N lines and the M lines form N×M pixels. As shown, the array substrate 10 includes a gate line 16 and a data line 17 that form a pixel region. A thin film transistor is formed at an intersection of the gate line 16 and the data line 17, with a pixel electrode 18 being formed at the pixel region.
In FIG. 1, a thin film transistor includes a gate electrode 21 connected to the gate line 16, a source electrode 22 connected to the data line 17, and a drain electrode 23 connected to the pixel electrode 18 through a first contact hole 40. The thin film transistor also includes a semiconductor layer (not shown) that forms a conductive channel between the source electrode 22 and the drain electrode 23. Gate voltages supplied to a gate electrode 21 are insulated from the source/drain electrodes 22 and 23 by a gate insulating film (not shown). A second insulating film (not shown) positioned above the gate insulating film insulates the gate electrodes. A first contact hole 40a that passes through the second insulating film connects the drain electrode 23 to a pixel electrode 18.
A pixel electrode 18 is coupled to a liquid crystal capacitor, a common electrode (not shown), of a color filter substrate. When a voltage is applied to a liquid crystal capacitor, charge is stored only temporarily because parasitic impedance provides a conducting path that tends to bleed off the charge. To overcome the transient nature of the circuit, a storage capacitor is connected to the liquid crystal capacitor.
In FIGS. 1 and 2A a storage capacitor may be formed by two methods. A first method forms an electrode for the storage capacitor that is connected to the storage electrode. A second method uses part of n-1th gate line to form an electrode for the storage capacitor of an nth pixel. The former method is called a storage on common method or an independence storage capacitor method, and the latter method is called a storage on gate method or a previous gate method.
The storage on gate method does not need external storage wirings since a storage signal is applied through the gate line. However, this method may cause interference with a storage voltage since it may be coupled to a previous gate signal. In comparison with the storage on gate method, the storage on common method needs additional wirings to receive and sustain a charge, but can maintain that charge without experiencing significant loses.
FIG. 1 shows a liquid crystal display panel having a storage capacitor formed by a storage on common method that uses a special storage line. As shown, a storage line 70 may be formed near the middle portion of the pixel region and may extend in a direction parallel to the gate line 16. The storage line 70 is used as an auxiliary capacitor (C) of a liquid crystal capacitor formed by the pixel electrode 18 and the common electrode. That is, the storage capacitor (C) is formed by a first storage electrode 70a and a second storage electrode 70b that is electrically connected to the pixel electrode 18 through a second contact hole 40b passing through a second insulating film. In fabrication, the second storage electrode 70b is formed on the first insulating film when the data line 17 and the source/drain electrode 22 and 23 are formed.
In FIG. 2a a circuit equivalent to a pixel of a liquid crystal display panel is shown. In this circuit, a thin film transistor (T) is turned on by a gate voltage received through a gate electrode (G) and a gate line (Gn). A data voltage that transmits an image signal is applied to a source electrode (S) connected to a data line (Dm). In FIG. 2A, the data voltage applied to the drain electrode (D) is applied to each liquid crystal capacitance (Cic) and a storage capacitance (Cst). When the data voltage is applied, it creates an electric field by the potential difference between the pixel electrode (P) and the common electrode.
The liquid crystals material aligns with the electric field and polarizes the light that passes through it. Unfortunately, the properties or characteristics of some liquid crystals may change when a DC voltage is applied for an extended period of time. To prevent some deterioration of the liquid crystal, the polarity of an image signal maybe changed periodically through a common electrode (Com). This driving method is known as an inversion driving method.
When a thin film transistor (T) is turned on, a voltage applied to the liquid crystal capacitance (Cic) and the storage capacitance (Cst) must be continuously maintained until the thin film transistor (T) is turned off. However in many displays, pixel voltages change (by ΔV) because of a parasitic capacitance formed by the overlap of the gate electrode (G) and the source/drain electrodes (S, D). The additional capacitance causes this voltage change, which is known as a level shift voltage or a kickback voltage. This incremental voltage may be calculated by the voltage divider shown below.ΔV={Cgs/{Cgs+Cic+Cst}}*ΔVg  Equation 1
In equation 1, ΔVg denotes the change in gate voltage, that is, the difference between a gate on voltage (Von) and a gate off voltage (Voff). The voltage distortion bleeds off the voltage maintained at the pixel electrode (P) regardless of the polarity of the data voltage. This phenomenon is illustrated in FIG. 2b. In FIG. 2b, Vg, Vd, and Vp, respectively denote a gate voltage, a data voltage, and a pixel electrode voltage. Vcom and ΔV, respectively, denote a voltage (common voltage) and a kickback voltage.
As shown by the dotted line in FIG. 2b, a data voltage (Vd) is maintained at a pixel electrode (P) in an ideal liquid crystal display panel even in the absence of a gate voltage. Unfortunately, the reality of the solid line shows that a pixel voltage (Vp) may drop by as much as a kickback voltage (ΔV) in actual liquid crystal display panels.
An effective value for a voltage applied to a liquid crystal is set by the level between a pixel voltage (Vp) and a common voltage (Vcom). When the liquid crystal display panel is driven by an inversion method, a common voltage (Vcom) level must be controlled so that level of pixel voltages (Vp) are symmetrical on the basis of the common voltage (Vcom). To this end, a constant common voltage (Vcom) by which levels of pixel voltages (Vp) are symmetrical may be applied.
Variations in pixel voltage may occur because the amount of pixel voltage (Vp) charged at each pixel may become different between frames when levels of pixel voltages (Vp) are not symmetrical based on the common voltage (Vcom). This condition may cause a screen flicker to occur when an inverted pixel voltage is sourced. However, even when a constant common voltage (Vcom) is applied to prevent a screen flicker, a DC component may remain at the pixel voltage (Vp) level due to a polar asymmetry of an image signal created by the kickback voltage (ΔV). A flicker, an afterimage, or a non-uniform image may occur.
Problems such as a screen flicker, an afterimage, or other similar interferences may be minimized by designing a storage capacitor within a liquid crystal display panel. A storage capacitor provides a storage capacitance (Cst) that may dampen the kickback voltage (ΔV). If a storage capacitor is formed by a storage on common method, special external storage wirings will be needed as shown in FIG. 3.
FIG. 3 is a plan view showing an array substrate 10 that includes storage wirings formed by a storage on common method. As shown, the array substrate 10 includes a pixel portion 20 formed by a plurality of pixel regions. The pixel regions are formed by a plurality gate lines (not shown) intersecting a plurality of data lines (not shown). A gate and data driving circuit 40 and 50, respectively, that drive a liquid crystal display panel are also shown.
The gate and data driving circuit 40 and 50, respectively, include a data driving circuit 50 coupled to data pads (not shown) and a gate driving circuit 40 coupled to gate pads (not shown), for transmitting signals to each gate line and each data line. A gate driver integrated circuit (IC) (not shown) and a data driver IC sequentially transmit signals to the respective pads.
In FIG. 3, each driver IC is mounted by a tape carrier package (TCP) method. The gate driver IC is mounted through a gate tape carrier package, and the data driver IC is mounted through a data tape carrier package. The data tape carrier package receives a data signal and a gate signal from a timing controller, and transmits the data signal to a data line of a liquid crystal display panel and transmits the gate signal to the gate tape carrier package. In the liquid crystal display device of FIG. 3, the timing controller and the data tape carrier package are mounted to a data circuit board. In these devices, the tape carrier package is attached to a gate circuit board that receives a gate signal through a flexible printed circuit. The flexible printed circuit connects the data circuit board to the gate circuit board. The gate signal is further transmitted to each gate tape carrier package through wiring printed onto the flexible circuit board.
In some liquid crystal displays, a gate circuit board is not needed. In these displays, a gate signal is transmitted through a wiring formed at a corner of a substrate. The gate signals do not pass through a flexible printed circuit but are instead transmitted to each gate tape carrier package through a wiring formed on the substrate.
In these liquid crystal displays, a storage line 70 as shown in FIG. 1, extends toward a gate driving circuit 40 in the pixel portion 20 and is connected to a storage signal supply wire 80. In FIG. 3, a storage voltage is transmitted from the data driving circuit 50 through a storage connection line 81 formed at one end of the storage signal supply wire 80. The storage signal supply wire 80 is formed between the pixel portion 20 of the array substrate 10 and the gate driving circuit 40. A silver dot pattern 60 maybe formed at the corners of the pixel portion 20 of the array substrate 10 to apply a common voltage to a color filter substrate.
In FIG. 3, one end of each storage line 70 is connected to the storage signal supply wire 80. The storage wirings 80 and 81 are then used to form an equivalent electric field. As shown, the storage wirings 80, 81 extend across large areas such as between a pixel region adjacent to a data pad and a pixel region positioned at an end of the storage signal supply wire or line. The length of this wire 86 may generate a voltage drop due to its internal resistance. Because of this resistance, signals may become attenuated which may cause image distortions.
As shown in FIG. 2a, a variation in voltage within a pixel portion may substantially affect a pixel's charge. An effective voltage difference may occur with a change in the common voltage (Vcom), thereby creating an image change. If the storage signal is greatly changed, an effective voltage at the pixel portion may substantially change too. In this liquid crystal display, a common voltage and a storage voltage determine the effective voltage of the pixel portion. All of the voltages substantially affect the effective voltage, and these signals must maintain a stable voltage.
Since a screen flicker or cross talk may occur with variations in a common voltage (Vcom), the source resistance (R) of the common voltage and the storage wiring and their capacitance (C) must be minimized. To that end, in some liquid crystal displays, the width of a common voltage wiring must be wide enough to minimize resistance, and the wiring area of the storage part must be wide enough to minimize the capacitive and resistive coupling that may occur.
The present invention is directed to a display that overcomes these potential drawbacks of the related art.